1. Field of the Invention
This invention relates to an electronic timing device and more particularly to a unique counter arrangement and an associated high speed test circuit to be disposed upon a single semiconductor chip.
2. Prior Art
Conventional counting techniques for an electronic digital timing device include a single main counter to be driven by an oscillator which generally provides an input signal having a frequency of 32,768 Hz. Therefore, the main counter of the prior art is required to divide the oscillator input signal by a factor of 32,768 before a usable 1 Hz. signal can be obtained. In order to either test or to normally operate the main counter of the prior art, the counter is first required to be cycled through 32,768 clock pulses. This technique substantially slows down the testing of the counter so as to make testing thereof relatively impractical. One example of a prior art arrangement can be found in U.S. Pat. No. 3,889,459, issued June 17, 1975.
What is more, the circuitry that is required to perform the test of the prior art counter is relatively large, thereby resulting in the necessity for a plurality of test pads as well as an uneconomical utilization of space on a semiconductor chip or chips.